Electronic Devices Formula Sheet — JEE Main Physics

Every key Electronic Devices formula, definition and theorem for JEE Main Physics in one place — with common examiner traps and worked examples. Free to read; blurt from memory, then check your gaps.

Syllabus — topics coveredNTA · 7 sub-topics

Semiconductors
Semiconductor diode: I-V characteristics
Diode as a rectifier
I-V characteristics of LED, photodiode, solar cell
Zener diode
Zener diode as voltage regulator
Logic gates: OR, AND, NOT, NAND and NOR

Semiconductors — Bands & Intrinsic

Energy band gap

E_{g}

: Gap between valence-band top and conduction-band bottom.

Conductor

: bands overlap (

E_{g} \approx 0

);

Semiconductor

E_{g} < 3

eV (Si

1.1

, Ge 0.72);

Insulator

E_{g} > 3

eV (diamond

5.4

Comparative: by conductivity

Class	$E_{g}$	$σ$ as $T ↑$
Conductor	$\approx 0$ (overlap)	falls
Semiconductor	$< 3$ eV	rises
Insulator	$> 3$ eV	negligible

Energy band diagrams: conductor with overlapping bands, semiconductor with a small gap under 3 eV, insulator with a large gap over 3 eV — Conduction needs electrons to cross $E_{g}$ .

Intrinsic semiconductor: Pure Si/Ge. Thermal energy breaks a covalent bond

\to

a free electron

+

hole

(effective charge

+ e

). Both carry current.

Intrinsic carriers

n_{e} = n_{h} = n_{i}, I = I_{e} + I_{h}

n_{i} =

intrinsic concentration; conduction by electrons AND holes

🚫 Examiner Trap · Bands & intrinsic

(1) A semiconductor's conductivity

rises

with T (more e–h pairs) — OPPOSITE to a metal. (2) At

T = 0

K a pure semiconductor is an

insulator

. (3) Diamond, Si, Ge share a lattice but differ in

E_{g}

— C is an insulator. (4) A hole is a

moving vacancy

, not a real particle, but carries

+ e

Extrinsic Semiconductors (n & p)

Doping: Adding a few ppm of impurity to raise conductivity. The doped crystal is

extrinsic

and stays overall

charge-neutral

Comparative: n-type vs p-type

	n-type	p-type
Dopant	pentavalent (As, P, Sb)	trivalent (B, Al, In)
Adds	donor electron	acceptor hole
Majority	electrons	holes
Minority	holes	electrons

Law of mass action

n_{e} n_{h} = n_{i}^{2}

holds in thermal equilibrium for intrinsic AND extrinsic; raising majority lowers minority

Conductivity

σ = \frac{1}{ρ} = e (n_{e} μ_{e} + n_{h} μ_{h}); μ = \frac{v _{d}}{E}

μ_{e}, μ_{h} =

electron and hole mobilities (

μ_{e} > μ_{h}

). In an extrinsic sample keep only the majority term; for n-type with donor density

N_{D} ≫ n_{i}

n_{e} \approx N_{D}

n_{h} = n_{i}^{2} / N_{D}

n-type lattice with a pentavalent +5 donor contributing a free electron; p-type lattice with a trivalent +3 acceptor creating a hole — Donor $\to$ spare electron (n); acceptor $\to$ hole (p).

🚫 Examiner Trap · Extrinsic semiconductors

(1) Doped crystals are

neutral

— donor/acceptor ion cores balance the extra carriers; n-type is NOT negatively charged. (2) Law of mass action

n_{e} n_{h} = n_{i}^{2}

— adding donors raises

n_{e}

but

lowers

n_{h}

. (3) Majority carrier set by dopant valency (5

\to

n, 3

\to

p). (4) Doping concentration

≪

host atoms (ppm) yet hugely raises

σ

p–n Junction & Diode I–V

Junction formation

▸ $Diffusion$ of majority carriers leaves immobile ions $\to$ $depletion region$ .
▸Its field drives $drift$ (opposite to diffusion); at equilibrium they balance (no net current).
▸Built-in $barrier$ $V_{0}$ : Si $\approx 0.7$ V, Ge $\approx 0.3$ V.

p-n junction at equilibrium: depletion region of width W with negative ions on the p-side and positive ions on the n-side, and the barrier potential V0 across it — Depletion width W and barrier $V_{0}$ at equilibrium.

Bias

Forward: (V_{0} - V), W ↓, I \sim mA; Reverse: (V_{0} + V), W ↑, I \sim μ A

forward lowers the barrier; reverse widens depletion

Diode I-V curve: negligible current until the forward knee near 0.7 V then a steep rise in mA; tiny reverse saturation current in microamps until reverse breakdown at V_br — Conducts forward past the knee; blocks in reverse.

Key voltages

V_{kn ee} : Si \approx 0.7, Ge \approx 0.3 V; r_{d} = \frac{Δ V}{Δ I}

r_{d} =

dynamic resistance (slope of the I-V curve)

🚫 Examiner Trap · p–n junction & diode

(1) The diode conducts only

above

the knee (

\approx 0.7

V for Si) in forward bias — not at any small voltage. (2) Reverse current (

μ

A) is nearly constant until breakdown

V_{b r}

. (3) Depletion width: forward

↓

, reverse

↑

. (4) The one-way (low forward / high reverse R) asymmetry is what rectifies.

Rectifiers & Filters

Rectifier: A circuit that converts AC to DC using a diode's one-way conduction — current passes only when the diode is forward biased.

Comparative: half-wave vs full-wave

	Half-wave	Full-wave
Diodes	1	2 (centre-tap) / 4 (bridge)
Output	$+$ halves only	both halves
Ripple freq	$f_{in}$	$2 f_{in}$
Efficiency	lower	higher

Rectifier output waveforms: half-wave passes only the positive halves of the input sine; full-wave flips the negative halves up so both halves appear — Half-wave: $+$ halves only. Full-wave: both halves.

⚡ Shortcut · Capacitor filter

A capacitor C across the load charges to the peak and discharges slowly (

τ = R_{L} C

), smoothing the pulses toward steady DC. Larger C

\Rightarrow

smaller ripple.

🚫 Examiner Trap · Rectifiers

(1) Full-wave ripple frequency is

2 f_{in}

(both halves) — half-wave is

f_{in}

. (2) A

bridge

(4 diodes) needs no centre-tap and uses the full secondary voltage; two opposite diodes conduct each half-cycle. (3) Each diode's reverse-breakdown rating must exceed the peak. (4) A rectifier gives

pulsating

DC; the filter makes it steady.

Special-Purpose Diodes

Zener diode: Heavily-doped diode run in reverse

breakdown

, where

V_{z}

stays nearly constant over a wide current range

\Rightarrow

voltage regulator.

Voltage regulator

V_{i} = I R_{S} + V_{z}, I = I_{z} + I_{L}

Zener reverse-biased, parallel with load; pick

I_{z} ≫ I_{L}

for good regulation. Recipe:

I = \frac{V _{i} - V _{z}}{R _{S}}

I_{L} = \frac{V _{z}}{R _{L}}

I_{z} = I - I_{L}

; Zener power

= V_{z} I_{z}

. If

I_{L}

would exceed I the Zener leaves breakdown and stops regulating. An LED emits

λ = \frac{h c}{E _{g}} = \frac{1240}{E _{g} ( eV )}

Left: Zener I-V with a sharp reverse breakdown holding constant Vz. Right: voltage-regulator circuit with series resistor Rs, Zener in reverse across the load RL, giving a steady output Vz — Breakdown holds $V_{z}$ constant $\to$ steady output.

Comparative: optoelectronic diodes

Device	Bias	Action
Zener	reverse	constant $V_{z}$ (regulator)
LED	forward	emits light ( $h ν \approx E_{g}$ )
Photodiode	reverse	photocurrent $\propto$ intensity
Solar cell	none	photovoltaic emf

🚫 Examiner Trap · Special diodes

(1) Zener & photodiode work in

reverse

bias; LED in

forward

; solar cell with

no

bias — a classic match question. (2) LED needs

E_{g} \geq 1.8

eV for visible light. (3) Solar-cell I–V lies in the

4th quadrant

(

V_{oc}

I_{sc}

). (4) Photodiode current

\propto

light intensity (a detector).

Junction Transistor & Amplifier

★ Remember · Transistor — not in JEE Main 2026 syllabus

'Transistor', 'amplifier' and 'oscillator' appear nowhere in the 2026 syllabus (it lists diodes, special diodes and logic gates only). This page is kept because older papers and practice questions still use it.

Junction transistor: Two back-to-back junctions (

npn

pnp

): emitter (heavily doped), base (thin, lightly doped), collector (moderately doped).

Active region

▸Emitter–Base $forward$ biased; Collector–Base $reverse$ biased.
▸Most carriers cross the thin base to C; only a few recombine ( $I_{B}$ small).

Current relations

I_{E} = I_{B} + I_{C}, α = \frac{I _{C}}{I _{E}} (< 1), β = \frac{I _{C}}{I _{B}} = \frac{α}{1 - α}

β

typically 20–200

npn transistor in common-emitter mode: emitter current in, base current out at the thin base, collector current out; with the current relations and voltage gain — Common-emitter: small $I_{B}$ controls large $I_{C}$ .

CE amplifier

A_{v} = \frac{V _{o u t}}{V _{in}} = β \frac{R _{o u t}}{R _{in}}

large voltage & power gain; output

18 0^{\circ}

out of phase with input

🚫 Examiner Trap · Transistor

(1) For amplification: E–B

forward

, C–B

reverse

— both wrong

\Rightarrow

cut-off/saturation. (2)

α < 1

always;

β = α / (1 - α)

can be large. (3) The base must be

thin, lightly doped

so few carriers recombine. (4) CE output is

inverted

(

18 0^{\circ}

) — a favourite exam point.

Logic Gates

Y = A + B

AND

Y = A \cdot B

NOT

Y = \overset{ˉ}{A}

NAND

Y = \overline{A \cdot B}

NOR

Y = \overline{A + B}

A	B	OR	AND	NAND	NOR
0	0	0	0	1	1
1	0	1	0	1	0
0	1	1	0	1	0
1	1	1	1	0	0

De Morgan's theorems

\overline{A + B} = \overset{ˉ}{A} \cdot \overset{ˉ}{B}, \overline{A \cdot B} = \overset{ˉ}{A} + \overset{ˉ}{B}

🚫 Examiner Trap · Logic gates

(1)

NAND

and

NOR

are

universal

— any gate can be built from only NANDs (or only NORs). (2) A NAND/NOR with both inputs tied together acts as a

NOT

. (3) De Morgan: bar of a sum

=

product of bars (and vice-versa). (4) NAND

=

AND then NOT (output inverted) — don't read it as AND.

Reading a gate circuit

▸Write the Boolean expression gate by gate from input to output, simplify with De Morgan, then fill the truth table for all $2^{n}$ input rows.
▸NOT from NAND: tie both inputs, $\overline{A \cdot A} = \overset{ˉ}{A}$ . AND from NAND: NAND followed by a NAND-NOT. OR from NAND: invert each input first, $\overline{\overset{ˉ}{A} \cdot \overset{ˉ}{B}} = A + B$ .
▸From NOR gates only: NOT $=$ tie both inputs; OR $=$ NOR then a NOR-NOT; AND $=$ invert each input first, $\overline{\overset{ˉ}{A} + \overset{ˉ}{B}} = A \cdot B$ .

More JEE Main Physics formula sheets

Frequently Asked Questions

What are the most important Electronic Devices formulas for JEE Main?

This Electronic Devices formula sheet covers all the high-yield Physics formulas, definitions and theorems you need for JEE Main, across Semiconductors, Semiconductor diode: I-V characteristics, Diode as a rectifier, I-V characteristics of LED, photodiode, solar cell, Zener diode — each shown with the key result and, where useful, a worked example.

Is this Electronic Devices formula sheet free?

Yes — the full chapter formula sheet is free to read online, no login or payment required.

How should I revise Electronic Devices formulas?

Blurt the Electronic Devices formulas from memory, then check against this sheet to find your gaps — and practise a few previous-year questions on the chapter to make sure you can apply them under time pressure.

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